Adaptive Linear Address Map for Bank Interleaving in DRAMs
نویسندگان
چکیده
منابع مشابه
Using Linear Tests for Transient Faults in DRAMs
Recent developments in the theory of DRAM fault modeling have identified the space of tests needed to detect all DRAM faults. Tests developed to target transient DRAM faults are very time consuming, as they have a quadratic dependence on the number of tested memory cells. This paper presents techniques to reduce the complexity of these tests. The paper also introduces a reduced test, with linea...
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ژورنال
عنوان ژورنال: IEEE Access
سال: 2019
ISSN: 2169-3536
DOI: 10.1109/access.2019.2940351